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OneWire

Struct OneWire 

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pub struct OneWire<'a> { /* private fields */ }
Expand description

Async 1-Wire bus master built on a pair of RMT TX/RX channels.

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impl<'a> OneWire<'a>

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pub fn new<Txc: TxChannelCreator<'a, Async>, Rxc: RxChannelCreator<'a, Async>, P: Pin + 'a>( txcc: Txc, rxcc: Rxc, pin: P, ) -> Result<Self, Error>

Create a 1-Wire master driving pin (open-drain, pull-up) using the supplied RMT TX and RX channel creators.

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impl<'a> OneWire<'a>

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pub async fn reset(&mut self) -> Result<bool, Error>

Issue a 1-Wire reset pulse and return true if at least one device responded with a presence pulse.

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pub async fn send_and_receive( &mut self, indata: &mut [PulseCode], data: &[PulseCode], ) -> Result<usize, Error>

Transmit data while simultaneously sampling the bus into indata, returning the number of received RMT symbols.

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pub fn encode_bit(bit: bool) -> PulseCode

Encode a single 1-Wire bit as an RMT pulse code (write/read time slot).

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pub fn decode_bit(code: PulseCode) -> bool

Decode a sampled RMT pulse code back into the 1-Wire bit value.

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pub async fn exchange_byte(&mut self, byte: u8) -> Result<u8, Error>

Write one byte (LSB first) and read the byte the bus returns in the same time slots.

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pub async fn send_byte(&mut self, byte: u8) -> Result<(), Error>

Write one byte (LSB first) without reading the response.

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pub async fn exchange_bits( &mut self, bits: &[bool], out: &mut [bool], ) -> Result<(), Error>

Write the bits in bits and read the bus response into out in the same time slots. bits and out must have equal length, and at most Self::MAX_EXCHANGE_BITS elements.

This replaces the original const-generic exchange_bits<const N> (which required generic_const_exprs) with a slice-based API backed by a small fixed-capacity buffer. The RMT framing is identical: each bit maps to one PulseCode followed by a trailing end_marker().

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pub async fn send_u64(&mut self, val: u64) -> Result<(), Error>

Write a 64-bit value (typically a ROM address) least-significant byte first.

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pub async fn send_address(&mut self, val: Address) -> Result<(), Error>

Write a 64-bit 1-Wire ROM Address.

Auto Trait Implementations§

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impl<'a> Freeze for OneWire<'a>

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impl<'a> PsramSafe for OneWire<'a>

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impl<'a> RefUnwindSafe for OneWire<'a>

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impl<'a> !Send for OneWire<'a>

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impl<'a> Sync for OneWire<'a>

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impl<'a> Unpin for OneWire<'a>

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impl<'a> UnsafeUnpin for OneWire<'a>

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impl<'a> !UnwindSafe for OneWire<'a>

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