Struct Spi2Resources 

pub struct Spi2Resources<'a> {
    pub spi2: AnySpi<'a>,
    pub spi2_dma: AnyGdmaChannel<'a>,
    pub sck: AnyPin<'a>,
    pub mosi: AnyPin<'a>,
    pub miso_dc: AnyPin<'a>,
    pub display_cs: AnyPin<'a>,
    pub card_cs: AnyPin<'a>,
}

SPI2 pins + units (CoreS3): SCK=GPIO36, MOSI=GPIO37, MISO/DC=GPIO35, display CS=GPIO3, card CS=GPIO4, GDMA channel 0.

Fields

spi2: AnySpi<'a>

spi2_dma: AnyGdmaChannel<'a>

sck: AnyPin<'a>

mosi: AnyPin<'a>

miso_dc: AnyPin<'a>

GPIO35 — SPI2 MISO (SD reads) and display DC via the register-level mux (crate::board::cores3::Gpio35Dc); see the module docs.

display_cs: AnyPin<'a>

card_cs: AnyPin<'a>

Implementations

impl Spi2Resources<'static>

pub async fn into_display_only( self, dma_rx_buf: DmaRxBuf, dma_tx_buf: DmaTxBuf, ) -> Result<DisplayBus, DisplayOnlyInitError>

Bring up the display only on a descriptor-backed SpiDmaBus, with no SD-card path. The DMA buffers are supplied by the app (TX sized to the display stripe; RX unused by a write-only panel). DC is a plain Output on GPIO35 — a configured output routes the pad, unlike Gpio35Dc which needs with_miso.

The panel must already be out of reset: call power_display_reset first (AW9523B LCD_RST pulse + AXP2101 backlight).

impl Spi2Resources<'static>

pub fn into_parts( self, dma_rx_buf: DmaRxBuf, dma_tx_buf: DmaTxBuf, ) -> Result<(Spi2Parts, Output<'static>), ConfigError>

Build the DMA bus and the CS outputs. The DMA buffers are supplied by the app — their sizing is application policy (SD block size for RX, display strip size for TX). Returns the card CS separately so the app can wrap it (e.g. a HIL “no SD card” kill-switch) before Spi2Parts::finish.