Expand description
IP5306 power-management / battery-gauge driver (Fire27 & classic Core).
The I2C-enabled IP5306 at address 0x75 is the battery charger/gauge on
the PMIC-less classic ESP32 cores: the M5Stack Fire carries one onboard,
and the M5GO Battery Bottom (A014) carries one to give the Basic Core
battery management. It sits on the M-Bus internal I2C bus (SharedI2cBus),
which on the Fire is G21/G22. The chip exposes only a coarse 4-step fuel
gauge plus charge / charge-done flags — no per-mV ADC.
Not used on CoreS3. The CoreS3 has its own PMIC (AXP2101 @ 0x34) that
manages the battery — including the M5GO bottom’s cell on the BAT pin — so
read the battery there via crate::driver::axp2101, not here. An A014
bottom’s IP5306 does not appear on the CoreS3 I2C scan.
Register map (matches the M5Stack Power/UIFlow IP5306 usage):
0x70 READ0 bit 3 = charging in progress (CHARGE_ENABLE)
0x71 READ1 bit 3 = charge complete (battery full)
0x78 READ4 bits[7:4] = remaining-gauge code (see [battery_level])
The 0x78 high nibble is the chip’s LED-gauge encoding, not a linear
percentage — it counts how many of the four gauge LEDs are unlit, so the
value runs “backwards”. Ip5306Driver::battery_level reproduces the exact
mapping M5Stack uses (0xF0→0%, 0xE0→25%, 0xC0→50%, 0x80→75%, 0x00→100%).
Refs: https://docs.m5stack.com/en/core/fire (IP5306 @ 0x75), https://zenn.dev/tomorrow56/articles/43f64daa279510?locale=en (register map)
Structs§
Enums§
Constants§
- IP5306_
ADDR - IP5306 I2C address on the M-Bus (7-bit; the chip’s raw 8-bit slave addr is 0xEA).